Overview

~150 lines of core MMC driver code, with 6 GPIO pins and 5 registers configured for the SDC0 controller. The goal was to bring up SD card read/write on a system that had no operating system, no standard library, and no pre-existing driver layer.

Technologies

C, RISC-V Assembly, Embedded Systems, Hardware Debugging, GPIO Configuration, MMC/SD Protocol, Allwinner D1-H SoC, Bare-metal Programming, System Integration.

Key Challenges & Solutions

GPIO Configuration

Problem: the SD card was not detected despite a seemingly correct clock configuration. Solution: systematically compared GPIO pin functions between a working reference system and the bare-metal target, and found that pins PF0–PF5 were configured for I2S2 audio (function 4) instead of SDC0 (function 2). Switching the multiplexing fixed detection.

Clock Domain Setup

Problem: the SMHC0 controller wasn't receiving valid clock signals. Solution: reverse-engineered the clock register values from a working system (0x8200000b) and reproduced the CCU (Clock Control Unit) configuration in the bare-metal driver.

HAL Dependencies

Problem: the upstream MMC code relied on utility functions that didn't exist in the target environment. Solution: wrote custom util.c/util.h implementing the essentials, including 64-bit timer access via CSR instructions, basic memory helpers, and cache management routines in RISC-V assembly.

Verification

Verified end-to-end by writing the string "Elias Chikwanda" to block 1025 of a physical SD card and reading it back from macOS using dd, confirming reliable read/write operation through the new driver path.